Japan Has Spent Roughly $16 Billion Reviving Advanced Chipmaking. Its New 2-Nanometer Fab Still Has Zero Signed Customers.
Rapidus is Japan's bet that a company with no chipmaking track record can vault straight to the same 2-nanometer process Taiwan and South Korea spent decades climbing toward, one generation at a time. It's already running real 2nm test wafers through a pilot line in Hokkaido. It just hasn't gotten a single customer to sign a volume order.
The node ladder: decades of climbing vs. one leap
Simplified, illustrative timeline — exact transition years vary by source and by manufacturer. The teal trail shows roughly when leading-edge foundries reached each process generation, climbing one rung at a time since 1990. The red trail shows Rapidus: no rung at all until its 2025 pilot line, then a direct jump to the 2nm rung targeted for 2027-28 — skipping the decades of intermediate nodes where that know-how is normally built. Drag the year slider or press Play.
The plain version
In the late 1980s, Japan made more than half the world's chips. By 2022, that share had fallen to about 9%, and the country's chipmaking fell roughly a decade behind the leaders — Taiwan's TSMC, South Korea's Samsung, and the US's Intel. Rapidus, a company Japan's government and eight big corporations created from scratch in 2022, is the plan to get back in the game. Its bet: skip the long climb and go straight for 2-nanometer chips, among the smallest, most advanced transistors anyone can build today.
Here's why that's a big ask. Every company currently making leading-edge chips got there by climbing a ladder — one process generation at a time, for decades, learning from failures along the way. Rapidus doesn't have that ladder. Instead, it licensed the base recipe for its 2-nanometer "gate-all-around" transistors from IBM's research labs and is trying to turn that lab recipe into a real, reliable factory floor — at a single plant in frozen Hokkaido, with a workforce that's never run a leading-edge fab before.
The good news: it's working, at least technically. The pilot line is running real 2-nanometer test wafers. The not-so-good news: Japan's taxpayers have now put in roughly $16 billion, and Rapidus's own CEO says the company has pitched more than 60 companies and quoted prices to about 10 of them — and as of its latest public update, not one has signed an actual order. Mass production is supposed to start in 2027, ramping up through 2028. Until someone signs, this is still a very expensive bet that the ladder can be skipped.
The expert version
Rapidus Corporation, incorporated in August 2022 by Japan's Ministry of Economy, Trade and Industry (METI) alongside eight founding companies (Toyota, Sony, NTT, NEC, SoftBank, Denso, Kioxia, and MUFG), is attempting to establish Japan's first domestic leading-edge logic foundry since the country's chipmaking share fell from over 50% of global production in the late 1980s to roughly 9% by 2022 — a decade or more behind current process leaders, per CSIS analysis. Its approach centers on a 2-nanometer-class gate-all-around (GAA, also called nanosheet) transistor process technology-transferred from IBM Research's Albany NanoTech Complex, with additional collaboration through Belgium's imec, rather than process knowledge accumulated through Rapidus's own iterative node history, since it has none.
The company's sole fab, IIM-1 in Chitose, Hokkaido, moved from construction to an operating pilot line through 2025, installing EUV lithography tools and running test wafers on the 2nm GAA process; Rapidus has also touted a "single-wafer" processing methodology — moving wafers through tools one at a time rather than in batches — intended to shorten yield-learning cycles relative to TSMC's and Samsung's batch processes, though this remains unproven at production scale. Rapidus closed a ¥267.6 billion (~$1.7 billion) funding round in February 2026 backed by the Japanese government and more than 30 private partners including Canon, Fujitsu, NTT, SoftBank, Sony, and Toyota; a further METI approval on April 11, 2026 brought cumulative Japanese government funding to roughly ¥2.6 trillion (about $16 billion). Independent estimates — including from the ASEAN+3 Macroeconomic Research Office — put the total capital required to reach stable, full-scale 2nm production closer to ¥5 trillion (roughly $32 billion), implying a meaningful funding gap still to close.
Commercially, CEO Atsuyoshi Koike has said Rapidus is in active discussions with more than 60 prospective customers and has issued preliminary pricing to roughly 10, reportedly targeting around $20,000 per 2nm-class wafer — undercutting TSMC's reported N2 pricing of roughly $30,000 — but as of its most recent public comments, no high-volume supply agreement has been signed. The company's roadmap targets 2nm production starting in the second half of Japan's fiscal 2027 (ending March 2028), scaling from an initial run rate near 6,000 wafer starts per month toward roughly 25,000 within the first year of full operation. Analysts at CSIS and elsewhere note the core risk: Rapidus lacks the decades of iterative yield and defect-learning experience that incumbent leading-edge foundries built organically, a gap that transferred technology alone has not historically closed for other would-be entrants to the leading edge.
Why it matters for tech + supply chain: everyone obsesses over TSMC's near-monopoly on leading-edge chips, but Rapidus is the live test of whether a government can simply buy its way back onto that short list — and so far, money has bought working silicon, not a single paying customer.
Why it matters for tech + supply chain: Rapidus is the cleanest live test case for whether transferred process technology plus state capital can substitute for decades of organic yield-learning at the leading edge — a question with direct relevance to every other country now weighing a sovereign leading-edge fab bet.